In the fabrication of integrated circuits, and other semiconductor devices, a substrate wafer, made of a material such as single crystal silicon, is doped, and a thin film is applied on the substrate surface. Thin films of conductive or insulative material may be deposited or otherwise applied onto the surface of the substrate, typically to a thickness of less than one micrometer, by a variety of conventional processes. The applied films are patterned to define an integrated circuit or other structure, with conductive films patterned to form device gates or interconnects and insulating films patterned to provide electrical isolation.
Thin films applied to substrates, in semiconductor manufacturing or otherwise, typically exhibit some intrinsic stress. This stress may be caused by a variety of mechanisms, such as lattice mismatch and dissimilar thermal expansion coefficients of the film and the substrate wafer. Failure to control these stresses can lead to failure of the electronic devices formed on the substrate. Device failure due to film stress may be caused, for example, by dislocation generation, film cracking, delamination, and/or void formation. Film stress may be controlled, to some extent, during application of the film onto the substrate by process variation, or afterward by annealing. However, in order accurately to control film stress, the stress must be measured accurately.
The patterning of the thin film that is applied to the substrate surface of the semiconductor device to form, e.g., an integrated circuit, typically is accomplished using a lithographic process employing one or more lithography masks. These lithography masks themselves typically are formed as a thin film layer, or multiple thin film layers, applied to a substrate. The thin film applied to the mask substrate is patterned, e.g., using laser etching, to form the mask pattern which, during the lithography process, is transferred to the integrated circuit substrate wafer being formed.
Feature sizes in modern integrated circuits have decreased dramatically in recent years. In order to meet the stringent requirements of reduced feature size, next-generation lithography (NGL) techniques, such as extreme ultraviolet lithography (EUVL) and electron projection lithography (EPL), are being developed. Design and implementation of a low-distortion lithography mask is one of the key issues for all NGL technologies. Intrinsic film stress generated during the fabrication process of advanced NGL masks can cause significant mechanical distortions, which compromise the accuracy of image resolution and placement. Dependable stress measurements thus also are necessary for controlling the distortions in the lithography masks used in semiconductor device fabrication to achieve high-quality reduced-feature size integrated circuits.
Techniques for directly measuring localized thin-film strain have been used for many years. Such techniques include x-ray diffraction and micro-Raman spectroscopy. However, the equipment required to obtain such direct measurements is expensive, and such methods are not well suited for production environments.
A common indirect method for determining thin film stress as used in the semiconductor industry is based on the measurement of the curvature of the substrate wafer, with a thin film applied thereto, to determine the thin film stress. This indirect method employs a laser scanner or full-field measurement device to determine the curvature of the substrate wafer. The out-of-plane displacement (OPD), rotation of the cross section, or the curvature generated by the intrinsic stress are measured in this manner. The film stress is then computed from the measured data. Although most available measuring tools provide accurate information about the induced substrate shape, i.e., the distorted shape of the substrate wafer with film applied, the film stress magnitudes and distributions generated by such techniques, in general, are not reliable. This is due to the fact that the calculations are based upon the local application of Stoney's equation, which is not valid for most real film-substrate systems.
The film and substrate comprising a semiconductor device, or mask used in the fabrication thereof, are usually made from different materials and have different lattice structure and thermal parameters. Thus, when the film is deposited onto the substrate, lattice and thermal mismatch strains are generated. These strains cause intrinsic stress and deformation in the film-substrate system. The film stress and substrate deformation are interdependent, so film stress can be determined from the measured substrate deformation. Stoney's equation is the most well-known expression linking film stress to substrate curvature. It was originally derived for a beam flexed by a uniform stressed film, and can be extended to determine the film stress on a plate substrate:σf=Est2sK/6tf(1−νs)  (1)where,                σf=film normal stress;        Es=elastic modulus of substrate;        ts=substrate thickness;        tf=film thickness;        νs=Poisson's ratio of the substrate;        K=curvature caused by intrinsic stress.        
Equation (1) is based on the assumption that the two in-plane principal stresses are equal to each other and their distribution is uniform. This assumption can be equivalently stated that, over the substrate, the curvature K is constant. In other words, the deformed substrate surface is perfectly spherical. Currently, many metrology tool manufacturers utilize Eq. (1) to calculate film stress point-by-point, i.e., the constant curvature K is replaced by the local curvature, Kloc. However, the validity of locally applying Stoney's equation has not been established. In most cases, the deformed substrate shape is not perfectly spherical, so the applicability of Stoney's equation is significantly limited.
Traditional finite element methods are widely used to analyze structures with known loads, and have also been applied to compute the film stress in film-substrate systems when the thermal and lattice mismatch strains were determined or estimated. However, in semiconductor and similar device manufacturing cases, the loading, intrinsic stress, or mismatch strain (which causes the film and substrate deformation) is unknown. Only the out-of-plane displacements, cross-section rotations, or curvatures at discrete points on top of the film or bottom of the substrate can be measured and can be used as input data for a finite element analysis.
What is desired, therefore, is an improved method for determining the film stress in thin films applied to substrates, particularly thin films applied to semiconductor substrates or thin films applied to substrates to form lithography masks used in semiconductor and similar fabrication processes. The desired method for determining film stress preferably is an indirect method that does not require expensive equipment, that is well-suited for production environments, and that is more accurate than current indirect methods for determining film stress that employ Stoney's equation.